High-Speed IO Architect - Digital - PCIe/UCIe/Ethernet Subsystems

Role Overview As the HSIO Architect , you will own the high-speed interface architecture across the various product families. You will drive decisions from SerDes architecture to UCIe die-to-die integration, working directly with the Head of Engineering, digital leads, and analog teams. You will also serve as the technical interface to key IP vendors (UCIe PHY, SerDes), foundry partners and anchor customers. This is not an IP integration role. We need someone who can define the architecture, va?